1. Field
This invention relates to clock generation, and more specifically to clock shrinking.
2. Background
Troubleshooting problems in electronic devices can be very difficult at times. This is especially true when problems occur on an intermittent or sporadic basis or are not easily repeatable. Many times these type problems relate to critical paths in a circuit that may be sensitive to the clocking scheme or clock edges during operation. Further, it may be desired to increase the operating frequency of an electronic device. In this regard, it may be desirable to increase the clock frequency in prototype devices to determine if any problems occur.
Currently, clock shrinking has been used to troubleshoot problems in electronic devices. Clock shrinking is used to shrink specific clock pulses in a clock signal and to determine if an increase in clock frequency causes potential problems. Current approaches to clock shrinking include generating a trigger to initiate the shrinking of a clock pulse. Currently, for every clock pulse to be shrunk, a corresponding trigger is required. This is useful for debug testing on a traditional tester for shrinking one clock at a time, but is ineffective in locating critical clocks on a system platform due to extremely long loops and difficulties setting and manipulating triggers.